This paper presents a new SWITCHED-CAPACITOR multilevel converter (SCMC), which is able to produce any levels at output voltage waveform. This topology can increase the value of input dc voltage sources using the SWITCHED-CAPACITOR units. In the proposed SCMC topology, as the numbers of SWITCHED-CAPACITOR unit increase, the voltage gain and the number of generated levels is increased. The main merit of proposed SCMC topology is an inherent voltage balancing of CAPACITORs. The proposed SCMC structure is compared with traditional multilevel converters. The comparison results verify that the presented SCMC structure needs lower dc voltages sources, switches, and CAPACITORs. The mathematical analysis of standing voltage on switches and different kinds of power losses are provided. In order to verify the performance of the presented SCMC topology, the experimental results for a typical 13-level converter are provided.

Background and Objectives: Increasing environmental problems and challenges have led to increased use of renewable energy sources such as photovoltaic or PV system. One of the attractive research fields is power electronic converters as interfaces for renewable energy sources. Multilevel inverters can operate as such interfaces. This paper introduces modified topologies of SWITCHED-CAPACITOR multilevel inverters, designed to overcome constraints of low voltage renewable energy sources such as PV. Methods: Configuration of topologies utilize a single DC source with series or parallel connection of CAPACITORs to produce 7-level, 9-level, and 11-level voltage in the converter load side. The paper presents the converter operation principle, elements voltage stress analysis, and CAPACITOR sizing calculations. Also, operation analysis of suggested inverter topologies is validated using implemented set up. Results: Comprehensive comparative analysis reveals that the proposed topologies have merits and superior performance compared to existing solutions regarding component number, voltage boost factor, and voltage stress. The experimental measurement results confirm the accuracy of multilevel output voltage waveforms and the self-balancing of CAPACITOR voltages, as predicted by theoretical analysis.Conclusion: The suggested SWITCHED-CAPACITOR multilevel inverters, moreover the superiority over previously presented topologies, show great potential for application in photovoltaic systems and electric vehicle battery banks.

A high-Q time-variant (TV) band-pass filter (BPF) is analyzed in this paper. N parallel identical low-pass RC FILTERS make this BPF, in which each of these N FILTERS is sequentially SWITCHED on for an equal time interval, periodically. The resulting BPF provides a stable frequency response and is insensitive to element variations. Through mathematical analysis, equations are derived for the frequency response and the bandwidth of the BPF. Moreover, the validity of these equations is confirmed by experimental results. These equations make the design of the above high-Q BPF an easy task.

The performance of a SWITCHED CAPACITOR circuit strongly depends on its analog switches. This paper introduces a new technique to design a high precision analog MOS switch for SWITCHED-CAPACITOR applications. To satisfy the accuracy requirements of the switch, a novel technique is proposed to minimize the charge injection and clock feed-through errors by using a very simple structure. Moreover, an innovative approach to increase the off-resistance of the switch and consequently minimizing its leakage current is presented. In order to evaluate the performance of the proposed switch, simulations are done in a 18μ m standard CMOS technology. The on-resistance of the proposed switch is less than 560Ω over entire input signal range which completely satisfies the tracking bandwidth requirements. In addition, since the proposed switch provides an ultra-high off-resistance in the range of several GΩ s, the leakage current of the proposed switch is negligible. Simulation results also show that switch induced errors are significantly eliminated by using the proposed cancellation technique. The output error charge due to charge injection and clock feedthrough over a wide range of the input signal variation is less than 1. 6fC. Moreover, simulation results show that the proposed switch achieves signal to noise plus distortion ratio (SNDR) of 80. 55dB, effective number of bits (ENOB) of 13. 08, total harmonic distortion (THD) of-81. 41dB and spurious-free dynamic range (SFDR) of 87. 7dB for a 2. 5MHz sinusoidal input of 800mv peak-topeak amplitude at 200MHz sampling rate with a 1. 8V supply voltage.

In this paper, a non-isolated current-fed high step-up soft-switching converter, is presented. In proposed converter are used of 2-stge SWITCHED CAPACITOR and a soft switching active cell. Compared to its high step-up counterpart, the proposed converter has a higher voltage gain. In this converter, an active clamp circuit is used to absorb the energy of leakage inductor, therefore, the ZVS for switches. Also, voltage stresses on the switches are low. In this paper, the operational principle and characteristics of proposed converter are presented, and in order to verify the proposed converter, a 20-400V, 200W prototype converter is simulated and implemented and experimental results are provided.

A very low voltage 9th order linear phase baseband SWITCHED CAPACITOR (SC) filter has ‎been designed to be used as part of a cellular GSM (Global System Mobile) receiver. ‎A Gaussian-to-6dB filter of the order of seven is chosen and a second order function ‎is added to reduce the group delay variations around 1m#s. The filter uses a fully ‎differential topology to increase the dynamic range and reduce the clock feed-through ‎noise and the distortion due to low voltage amplifier. Using a chopper stabilization ‎technique in opamp design reduces the flicker noise. In order to reduce the charge ‎injection two methods of delayed clock phases and dummy switches are used. The ‎filter is realized by cascading the biquad sections. The filter has been designed in a ‎‎0.35 m#m CMOS technology and simulated with Hspice using BSIM 3V3model. The ‎filter operates at 2MHz sampling frequency and 1MHz chopping frequency with a ‎corner frequency of 100 KHz and 7 mW power consumption‏.‏

This paper presents a new SWITCHED-CAPACITOR Multilevel Inverter (SCMLI) structure. The presented configuration generates a staircase almost sinusoidal AC voltage by using a single DC source and a few CAPACITORs which its amplitude is several times the input voltage. The operation of the converter is controlled by the help of NLC modulation strategy to choose the best switching states in a way that they always ensure the self-balancing capability of the CAPACITORs voltages. Low switching frequency, simple control and inherent bipolar output are some of the advantages of the presented SCMLI. In comparison with other existing topologies, to reach a specific voltage level, the structure requires less circuit elements since the CAPACITORs in follower modules can be charged up to 3 times the input voltage. Having a modular structure, facilitates the expansion of the circuit to attain higher voltage levels. In order to investigate the performance of the presented topology, MATLAB software was used. Furthermore, a 13-level laboratory prototype was performed to affirm the efficacy of the circuit under different loads using AVR ATMEGA 16A microcontroller. Both simulation and experimental results accredit the appropriate performance of the converter. Finally, after calculating losses, a theoretical efficiency of 92. 72% is reached.

This paper proposes a topology of SWITCHED-inductor/CAPACITOR quasi z-source inverter (SIC-qZSI) based on the classic qZSI. This topology is symmetric with a high boost factor in the low duty cycle and high modulation index, the low voltage stress on the CAPACITORs, and the low current of the inductors and the input source. In addition, the current of all inductors and the input current are equal, and the voltage across all the inductors, as well as the voltage across all diodes, are equal. The performance of the proposed topology is confirmed with MATLAB/SIMULINK software and the simulation results and obtained relations are certified by using a prototype of the proposed inverter.

This paper investigates the connection of a single-phase multilevel inverter structure to an existing power grid. The applied voltage source inverter is able to generate a near sinusoidal voltage waveform with an amplitude six times the input voltage by using a single DC input power supply. A proportional-resonant (PR) controller regulates the injected current into the grid while an EPLL is used to ensure the synchronization of the phase and the frequency of the output voltage with the grid. The performance of the grid-connected inverter under different loading conditions was simulated in MATLAB software. Finally, the simulation results were compared with those of the experimental ones. In addition, the behavior of the inverter in standalone operating mode, while supplying a local load, as well as its grid-tied performance with a constant and variable current reference was evaluated. The correct operation of the inverter in all operating modes, achieving 96.9% efficiency, along with the self-voltage balancing of the CAPACITORs makes it suitable for the application of grid-integration of the low-voltage renewable energy sources.