This paper presents a new SWITCHED-CAPACITOR multilevel converter (SCMC), which is able to produce any levels at output voltage waveform. This topology can increase the value of input dc voltage sources using the SWITCHED-CAPACITOR units. In the proposed SCMC topology, as the numbers of SWITCHED-CAPACITOR unit increase, the voltage gain and the number of generated levels is increased. The main merit of proposed SCMC topology is an inherent voltage balancing of CAPACITORs. The proposed SCMC structure is compared with traditional multilevel converters. The comparison results verify that the presented SCMC structure needs lower dc voltages sources, switches, and CAPACITORs. The mathematical analysis of standing voltage on switches and different kinds of power losses are provided. In order to verify the performance of the presented SCMC topology, the experimental results for a typical 13-level converter are provided.

Background and Objectives: Increasing environmental problems and challenges have led to increased use of renewable energy sources such as photovoltaic or PV system. One of the attractive research fields is power electronic converters as interfaces for renewable energy sources. Multilevel inverters can operate as such interfaces. This paper introduces modified topologies of SWITCHED-CAPACITOR multilevel inverters, designed to overcome constraints of low voltage renewable energy sources such as PV. Methods: Configuration of topologies utilize a single DC source with series or parallel connection of CAPACITORs to produce 7-level, 9-level, and 11-level voltage in the converter load side. The paper presents the converter operation principle, elements voltage stress analysis, and CAPACITOR sizing calculations. Also, operation analysis of suggested inverter topologies is validated using implemented set up. Results: Comprehensive comparative analysis reveals that the proposed topologies have merits and superior performance compared to existing solutions regarding component number, voltage boost factor, and voltage stress. The experimental measurement results confirm the accuracy of multilevel output voltage waveforms and the self-balancing of CAPACITOR voltages, as predicted by theoretical analysis.Conclusion: The suggested SWITCHED-CAPACITOR multilevel inverters, moreover the superiority over previously presented topologies, show great potential for application in photovoltaic systems and electric vehicle battery banks.

A high-Q time-variant (TV) band-pass filter (BPF) is analyzed in this paper. N parallel identical low-pass RC FILTERS make this BPF, in which each of these N FILTERS is sequentially SWITCHED on for an equal time interval, periodically. The resulting BPF provides a stable frequency response and is insensitive to element variations. Through mathematical analysis, equations are derived for the frequency response and the bandwidth of the BPF. Moreover, the validity of these equations is confirmed by experimental results. These equations make the design of the above high-Q BPF an easy task.

A very low voltage 9th order linear phase baseband SWITCHED CAPACITOR (SC) filter has ‎been designed to be used as part of a cellular GSM (Global System Mobile) receiver. ‎A Gaussian-to-6dB filter of the order of seven is chosen and a second order function ‎is added to reduce the group delay variations around 1m#s. The filter uses a fully ‎differential topology to increase the dynamic range and reduce the clock feed-through ‎noise and the distortion due to low voltage amplifier. Using a chopper stabilization ‎technique in opamp design reduces the flicker noise. In order to reduce the charge ‎injection two methods of delayed clock phases and dummy switches are used. The ‎filter is realized by cascading the biquad sections. The filter has been designed in a ‎‎0.35 m#m CMOS technology and simulated with Hspice using BSIM 3V3model. The ‎filter operates at 2MHz sampling frequency and 1MHz chopping frequency with a ‎corner frequency of 100 KHz and 7 mW power consumption‏.‏

This paper proposes a topology of SWITCHED-inductor/CAPACITOR quasi z-source inverter (SIC-qZSI) based on the classic qZSI. This topology is symmetric with a high boost factor in the low duty cycle and high modulation index, the low voltage stress on the CAPACITORs, and the low current of the inductors and the input source. In addition, the current of all inductors and the input current are equal, and the voltage across all the inductors, as well as the voltage across all diodes, are equal. The performance of the proposed topology is confirmed with MATLAB/SIMULINK software and the simulation results and obtained relations are certified by using a prototype of the proposed inverter.