Paper Information

Journal:   SCIENTIA IRANICA   MARCH- APRIL 2008 , Volume 15 , Number 2; Page(s) 151 To 159.
 
Paper: 

AN 8-BIT CURRENT-MODE FOLDING ADC WITH OPTIMIZED ACTIVE AVERAGING NETWORK

 
 
Author(s):  AZIN M.*, SHARIF BAKHTIAR M.
 
* DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE, CASE WESTERN RESERVE UNIVERSITY, CLEVELAND, OHIO, USA
 
Abstract: 

In this paper, an 8-bit CMOS current-mode folding-interpolating ADC is presented. A new active averaging-interpolating network is described, which results in a better error correction factor compared to its resistive counterpart. Using novel circuits for fast settling and careful transistor sizing, a fast (>160 Msps) and low power (70 mW in 2.5 V supply voltage) 8-bit ADC, with a total chip area of 1 x 1.4 mm in a 0.25 micron CMOS process, is demonstrated.

 
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