Paper Information

Journal:   SCIENTIA IRANICA   SUMMER 2004 , Volume 11 , Number 3; Page(s) 159 To 164.
 
Paper: 

ON ROUTING ARCHITECTURE FOR HYBRID FPGA

 
 
Author(s):  NAJAR BASHI M.*, FAKHRAEI S.M., KAVIANI A.
 
* DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING, UNIVERSITY OF TEHRAN, TEHRAN, I.R. IRAN
 
Abstract: 

In this paper, the routing architecture for an FPGA with hybrid clusters built from a mixture of LUT-based and PLA-like blocks is investigated. The implemented CAD flow that is used to place and route a number of MCNC benchmark circuits in a comparative fashion is discussed. The experimental results demonstrate that cluster sizes of two (2 LUT blocks and 2 PAL blocks) to four (4 LUT blocks and 4 PAL blocks) are appropriate in terms of area and speed. A comparison between hybrid and LUT-based FPGA architectures is also presented, showing that hybrid FPGA has some considerable advantages over a uniform LUT-based architecture.

 
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