Paper Information

Journal:   JOURNAL OF FACULTY OF ENGINEERING (UNIVERSITY OF TABRIZ)   SPRING-SUMMER 2003 , Volume 29 , Number 1 (31 ELECTRICAL ENGINEERING); Page(s) 1 To 13.
 
Paper: 

AMPLITUDE REDUCTION OF HARMONICS OF OUTPUT VOLTAGE OF A THREE-PHASE PWM INVERTER USING PARALLEL TRANSISTORS

 
Author(s):  BARATI H., HOSSEINI SEYED HOSSIEN, JAVAHERI EHSAN
 
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Abstract: 

This paper presents a three-phase PWM inverter in which power transistors are used as switches. In this type .of inverter current-sharing reactors are used, and in each phase four transistors are used compared to two transistors used in conventional inverters. By using this inverter more amount of current can be attained as well as output voltage harmonics are greatly reduced and output voltage waveform will be a curve of five levels of voltage which resembles more closely to a sine wave. The correction role of increase in number of transistors in each phase, which causes increase in power level and a reduction in output voltage harmonics has been shown using time-scale waveforms, frequency spectrum and the effect of variations of modulation index on amplitude of harmonic component. Finally, experimental results of such, an inverter design in a laboratory have been has presented which completely agrees with theory.

 
Keyword(s): INVERTER, PWM, HARMONIC, PARALLEL TRANSISTOR, CURRENT-SHARING, ACTORS
 
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